Virtualization, System Verilog, Multi-core ARMv8 CPU architecture, Silicon debug tool chains, Digital design concepts, Debug, HW-SW debug, Uvm, Coherency protocols, Post-Si bring-up

Linux Commands, Power-Aware verification, Advanced verification methodology such as SystemVerilog-UVM, GVIM, assertion model development, SOC level test bench and test plan development, coverage development, Functional Verification, SystemVerilog UVM testbenches, Amba Protocols, Clearcase Repository

code coverage , Scoreboards, Functional coverage, Assertions, RTL verification using Verilog and SystemVerilog, Constrained-random verification environments, Verification closure methodologies, Testbenches, Regression management, Coverage-driven verification techniques, Developing verification plans, Digital Verification

Scripting, C, Pcie, Ethernet, SV, Digital Electronics, Programming fundamentals, CXL, UCIe, Uvm

C, System Verilog, SoC Verification

Spi, PYTHON, Uart, Usb, I2c, Ethernet, Pcie, PERL, Oop Concepts, LPDDR3, Ucie, DDR4, UCIe, Uvm, SV, AHB, CXL, D2D, C2C, NoC Interconnect verification, APB, Axi