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Design Verification Engineer

Design Verification Engineer

CADENCE
Early Applicant
  • Posted 19 days ago
  • Be among the first 10 applicants

Job Description

Job Summary

We are seeking a highly motivated candidate with expertise in functional verification, specifically focusing on Verification IP (VIP) development. The ideal candidate will be able to quickly and independently adapt to new technologies and protocols. Excellent communication skills are essential, as the role involves cross-functional collaboration and close interaction with customers.

Job Responsibilities

Responsible for the design, development, verification and deployment of the VIP.

Experience and Technical Skills required

  • 3+ years of domain experience
  • Proficiency in functional verification, test environment creation using SV/UVM with strong debug skills.
  • Hands-on knowledge of C/C++/Scripting.
  • Working experience on layered Protocols - UCIe, PCIe, CXL, Ethernet.
  • Prior VIP usage and development experience is a plus.
  • Strong Digital Electronics and Programming fundamentals.
  • Self-motivated individuals with strong analytical and communication skills.

Qualifications

BE/BTech / M. Tech/ ME

Behavioral skills required

Demonstrate adaptability in a fast-paced environment, showing resilience in the face of challenges and maintaining a positive attitude.

Exhibit a strong commitment to continuous learning and professional development, staying abreast of industry trends and technologies.

Foster a collaborative team environment by being approachable and supportive.

Display a proactive approach to problem-solving, taking initiative, and anticipating potential issues before they arise.

More Info

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Key Skills

SV

Programming fundamentals

CXL

UCIe

About Company

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