FinFET technologies, physical implementation, Analog Layout, Analog Mixed Signal Layout, advanced node designs

layout of Analog blocks reference amplifier data converters, Dongbu PDK, Mixed Signal and Analog Layout, Mentor Tools Calibre, Cadence Tools, BCD process

advanced matching and layout techniques, DRC LVS ERC and PEX, Cadence Virtuoso Custom Compiler, FinFET advanced-node layout, lower-node technologies, Analog Mixed-Signal Layout, MOS resistor capacitor current mirror differential pair and analog IP layouts

Analog layout techniques, ESD reviews, Crystal Oscillators, Common centroid layout, Data converters, Cadence Virtuoso, EM IR analysis

Synopsys IC Validator, Calibre DRC LVS PEX, high-speed analog and mixed-signal layout design, Custom Compiler, LVS, Cadence Pegasus, DRC, Cadence Virtuoso Layout Suite, ERC checks, 7nm FinFET technology

analog circuits , Circuit Design, Custom Layout, Mentor, LVS, Physical Verification, ERC, DRC, Siemens, Synopsys, Cadence Virtuoso, Layout Design

manufacturing processes , Calibre, Analog Layout, Cadence Virtuoso XL, Design for manufacturability, Signal integrity analysis, Parasitic Extraction

Custom Analog Layout, Hercules, SKILL Programming, PDK maintenance, semiconductor process technologies, LVS, Physical Verification, Calibre, Assura, custom layout methodologies, Virtuoso XL, ERC, DRC, PCell development, fabrication concepts, Cadence Virtuoso