C, Makefile, Windows, Shell, Linux, Perl, Verilog, Ruby, System Verilog, Systemc, IP level ASIC verification, graphics pipeline knowledge, HLS tools, UVM testbenches, simulation profile efficiency improvement, UVM based verification frameworks, TLM, debugging firmware and RTL code using simulation tools

Fpga, Vcs, Pcie, Ethernet, Xcelium, Emulation, Uvm, systemverilog, Dft, Questa, DDR5, DDR4

Verilog, systemverilog, assertion-based verification, Uvm, functional coverage, advanced verification methodologies, VMM, random stimulus

Perl, Ruby, System Verilog, Asic verification, Rtl Design, make, Uvm, formal verification, TestBench Development

Verilog, Matlab, Python, FPGA-based emulation, DSP concepts

C, Debugging, Verilog RTL, Verification Techniques, Communication Interfaces, Scripting and Automation, EDA Tools, Uvm, Digital and SoC Verification, C DPI, systemverilog

SoC Verification, Uvm, Debugging Expertise, Verification Planning, C DPI Development, Scripting and Automation, systemverilog, Coverage-Driven Verification