ASIC Verification Engineer On-site (India)
About The Opportunity
A fast-moving company in the Semiconductor & VLSI design sector is hiring an on-site Verification Engineer to join its SoC/ASIC verification team. The role focuses on coverage-driven RTL verification, debug, and automation to deliver silicon-quality IP and subsystem releases on aggressive schedules. This is an opportunity to work on end-to-end chip verification for high-performance digital blocks.
Role & Responsibilities
- Design and implement UVM/SystemVerilog verification environments and reusable testbenches for IP and subsystem-level blocks.
- Create comprehensive verification plans, develop constrained-random testcases, and drive functional and code coverage closure.
- Develop and run large-scale regression suites using simulators (Questa/VCS/Xcelium) and automate flows with Python/Tcl.
- Perform RTL debug, triage failures, and collaborate with design and firmware teams to root-cause issues and deliver fixes.
- Integrate assertion-based verification (SVA) and functional coverage metrics into continuous verification pipelines.
- Contribute to verification best practices: scoreboards, coverage-driven methodologies, and verification IP reuse.
Skills & Qualifications
Must-Have
- SystemVerilog
- UVM
- Functional coverage
- Questa
- VCS
- Python
Preferred
- SVA (SystemVerilog Assertions)
- UPF / low-power verification
- Emulation / FPGA prototyping
Benefits & Culture Highlights
- Hands-on ownership of verification for silicon projects with visibility across design and validation teams.
- Technical growth through mentorship, code reviews, and adoption of industry-standard verification methodologies.
- On-site collaboration with cross-functional engineering teams to accelerate time-to-silicon.
This role is ideal for engineers who thrive in fast-paced semiconductor programs, have a strong verification toolset, and are committed to delivering production-quality silicon. Apply if you are located in India and available for on-site work.
Skills: verification,systemverilog,verification engineer,python,questa,semiconductor & vlsi design
