Job Description :
Synthesis Engineer: (5+ Years) Key Responsibilities: Synthesis Environment setup Validating synthesis SDC quality Utilize Synthesis tool variables and methodologies to extract the best area/power achievable for the process node. Checking the synthesis DEF quality Analyze critical timing violation groups and congestion - solve them by finetune floorplan or placement constraints. Compare area/power with previous projects and check current project results. DFT Insertion and debugging basic DFT issues. Discuss directly with Design teams & Physical design teams to get the best synthesis results.
Job Requirement:
Requirements : . Good experience in Low Power optimization & CLP. . Hands on Netlist level design quality analysis . Minimum 5 years of experience in the area of Synthesis . Bachelor's or Master's Degree with a strong VLSI Background.
