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Staff Engineer, PDN/PV(Design Enablement)
Job Description
Responsibilities:
- Work as part of the Design Enablement team, closely collaborating with SoC cross-functional teams
- Define and develop PDN and PV flows and methodologies for low geometry nodes (3nm, 5nm, 16nm)
- Manage requirements and define tools and flows needed for SoC-level implementation
- Collaborate with EDA vendors to evaluate and benchmark latest PDN & PV tools and methodologies
- Lead deployment and adoption of new tools, flows, and methodologies across the organization
- Act as a change agent in introducing innovative flow improvements and process standardization
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Key Skills
About Company
Renesas is an embedded semiconductor solution provider driven by its Purpose To Make Our Lives Easier.As the industrys leading expert in embedded processing with unmatched quality and system-level know-how, we have evolved to provide scalable and comprehensive semiconductor solutions for automotive, industrial, infrastructure, and IoT industries based on the broadest product portfolio, including High Performance Computing, Embedded Processing, Analog Connectivity, and Power.
Skills:
PDN, Physical Verification, IR Drop, EM analysis, LVS, Antenna Checks
Skills:
Unix, Clp, Linux, Perl, Integration, Scripting, Tcl, floorplanning, LEC, PNR, STA flows, Placement, Optimization, ASIC Design, Verification, PDN, Validation
Skills:
CMOS layout fundamentals, LVS closure, DRC closure, Analog custom layout techniques, Physical verification flows, FinFET technology nodes, Cadence Virtuoso, Parasitic Extraction, Reliability checks, Layout automation, Physical verification tools, Layout methodologies, ERC, Device matching and symmetry, Scripting in Tcl