Staff Engineer, Digital Design Engineering

About Analog Devices

Analog Devices, Inc. (NASDAQ:) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more atand onand.

Team

The charter of ADI's GMSL team is to lead the market in automotive technology domains with highly differentiated video over serial link ASIC solutions. As part of our expanding business needs, we are now seeking to fill a Staff Digital Design Engineer position responsible for development of cutting-edge technology Video and SERDES products and IPs.

Designation & Roles:Staff Digital Design Engineer.

Job description:

Staff Digital Design Engineer responsible for the design and development of IP/top level designs.

Responsibilities:

RTL front-end design. Design of IP and full chip integration including architecture, microarchitecture, logic design, LINT, Clock Domain Crossing Analysis.

Own major blocks in a design and provide technical guidance to the team.

Work with the DV team to ensure proper closure of the owned blocks in terms of functionality, code coverage etc

Interface with applications and test for any silicon debug by providing the necessary data for analysis and for resolving issues.

Own some front-end implementation flows for an IC.

Develop Design and Implementation to enable best possible PPA, robust product quality and design for debug and test.

Use of AI tools as needed for productivity or methodology improvements

Skills required:

Solid understanding of digital design concepts, micro architecture.

Hands on experience on front end implementation tools for Lint, CDC. Knowledge of concepts for Equivalence Check, Synthesis & STA, Power estimation tools.

Hands on experience on IP level verification or unit testing

Good understanding of the entire ASIC design flow involving logic design, verification, synthesis, timing and backend.

Understanding of ASIC synthesis, constraints development & analysis, STA, & DFT.

Hands on experience or good understanding of gate level simulations

Must be able to work autonomously and guide others based on changing priorities.

Ability to learn, adapt & improve on to new methodologies and technologies.

Experience in high speed design and communications such as I2C, UART, SPI.

Excellent analytical and debugging skills and the ability to proactively solve issues.

Must be a highly motivated with good aptitude and attitude.

Good cross functional collaboration, communication & interpersonal skills.

Knowledge of protocols such as HDMI, DP, MIPI, ethernet protocols an added advantage.

Knowledge of functional safety design an added advantage.

ACADEMIC CREDENTIALS:

BE/B.Tech/M.E/M.Tech in EE/ECE with a minimum of 7+ years of relevant work experience.