Staff CAD Engineer (PDK, PV and Design Enablement)

In this critical role as a member of our central CAD team, you will be responsible for PDK/PV flow deployment (installation, configuration, customization, QA, release and support) and support analog circuit/layout teams. You will be involved in setting up and supporting full-custom design environment (PDK, schematic, layout, spice model, simulation, netlisting, physical verification) using industry standard EDA tools and provide user support for Virtuoso, DRC and LVS debugging to streamline physical verification flows. You will automate design tasks, including physical verification flow, design rule decks, improve design efficiency and reduce time-to-market. You will collaborate with cross-functional teams, including, foundry engineers, design engineers, layout designers, to provide technical guidance, support, and training on CAD and EDA tools and methodologies Experience with advanced FinFETnodes like 5nm/7nm, FinFET layout and Calibre DRC/LVS is a must.

Description

Your Primary responsibilities include but not limited to the following:

* Download, install, configure PDK and PV flows from foundry partners

* Customize and document PDK and design flows to meet requirements

* Support and release PDK and design flows to worldwide design community

* Develop and customize Physical Verification (DRC/LVS) flows using Calibre

* Support FinFET layout and Cadence virtuoso tool

* Develop scripts to automate various CAD flows

• * Support design teams on EDA tools and CAD flow related issues