Description
We are seeking a Staff ASIC RTL Digital Design Engineer to join our dynamic team in India. The ideal candidate will have a strong background in ASIC design and will be responsible for developing high-quality RTL designs, participating in verification processes, and collaborating with multiple teams to ensure successful project completion.
Responsibilities
- Design and implement RTL code for ASIC digital circuits.
- Perform RTL simulations and verification using tools like ModelSim or VCS.
- Collaborate with verification engineers to ensure design functionality and performance.
- Participate in design reviews and provide constructive feedback.
- Work closely with physical design teams to ensure successful handoff and integration of digital designs.
- Troubleshoot and resolve design issues during the development and testing phases.
Skills and Qualifications
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
- 5-10 years of experience in ASIC digital design and RTL coding.
- Proficient in VHDL/Verilog/SystemVerilog for RTL design.
- Experience with digital design tools such as Cadence, Synopsys, or Mentor Graphics.
- Strong understanding of digital logic design principles and methodologies.
- Familiarity with ASIC design flow, including synthesis, place and route, and timing closure.
- Ability to work collaboratively in a team environment and communicate effectively with cross-functional teams.
