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Staff Analog layout Engineer

2-8 Years
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Job Description

  • Develops block, macro, or chip-level layouts and floorplans in line with project requirements, specifications, and design schematics.
  • Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs.
  • Conducts analyses, tests, and verifies designs using various tools and techniques to identify and troubleshoot issues. Stays updated on new verification methods.
  • Collaborates with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Required Qualifications

  • Experience in high-speed IO/ESD/Analog layout design: 8 to 12 years of solid experience.
  • FinFET Layout Expertise: Proven expertise in working on FinFET layouts in lower nodes, with a preference for TSMC 7nm and below.
  • Tool Proficiency: Expertise in using the best and latest features of Cadence VXL and Calibre DRC/LVS.
  • Layout Design & Verification Tools: 2+ years of experience using layout design and verification tools (e.g., Cadence, LVS, rmap).
  • IO/ESD Design: Basic understanding of IO/ESD designs.
  • Scripting Knowledge: Knowledge of Basic or Perl.
  • Collaboration & Independence: Capable of working independently and with a team, and effectively managing work with a contract workforce.
  • Global Communication: Ability to work and communicate effectively with global engineering teams.

Minimum Education & Experience

  • Bachelor's Degree: Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or a related field, along with 2+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).
  • Associate's Degree: Associate's degree in Computer Science, Mathematics, Electrical Engineering, or a related field, along with 4+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).
  • High School Diploma: High School diploma or equivalent, along with 6+ years of experience designing custom layouts in a relevant domain (e.g., analog, mixed signal, RF, digital design).

More Info

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Open to candidates from:
Indian

About Company

QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.
QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G wireless technology, in demand by a growing and increasingly sophisticated wireless community.

Job ID: 119838073

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