STA/Timing Methodology Sr Engineer

Qualcomm

Bengaluru

4-7 Years

Save

Posted 12 days ago
Be among the first 10 applicants

Early Applicant

Quick Apply

Job Description

Bachelors degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
Masters degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.Additional Job Description

Minimum Qualifications:

Bachelors degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
Masters degree in computer science, Electrical/Electronics Engineering, Engineering, or related field and 3+ year of Hardware Engineering or related work experience.

STA/Timing CAD Methodology Lead

As an STA CAD methodology lead, the role would expect the candidate to lead deployment of new features and or methodologies related to STA and ECO domain
Scope of the work would cover (but not limited to) STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence with tools in STA and ECO domain (PrimeTime, Tempus, Tweaker, PrimeClosure to name a few)
There would be challenges for timing convergence at both block and Top level on cutting edge technology on high performance designs would have to be resolved for ensuring successful design tapeouts on time with high quality.

Key requirements:

Thorough knowledge of the ASIC design cycle and timing closure flow and methodology.
3 + years of proficiency in timing constraints and timing closure. Expertise in STA tools (any of Primetime, Tempus, Tweaker) and flow.
Strong understanding of advanced STA concepts and challenges in advanced nodes
Proficiency scripting languages (TCL, Perl, Python).
Strong background in PNR and Extraction domain.
Experience of constraints development tool (like spyglass) will be added advantage.
Leadership qualities to lead (technically) and manage the STA CAD team

Qualification:

BE/BTech + 4 years of experience, or ME/MTech + 3 years of experience

More Info

Job Type:

Permanent Job

Industry:

Semiconductor

Role:

Others

Function:

IT- Hardware/Telecom/Technical Staff/Support

Employment Type:

Full time

Open to candidates from:

Indian

About Company

Qualcomm

QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.
QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.
QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G wireless technology, in demand by a growing and increasingly sophisticated wireless community.

Job ID: 115162935

Jobs by Skill - IT