STA Lead

Perl, Python, Tcl, OCV, SDC Constraints Development Validation, primetime, Fusion Compiler, Crosstalk and Noise Analysis, Tempus, RTL-to-GDSII Implementation Flow, CRPR, Clock Architecture and CTS, Innovus, MCMM Timing Closure, POCV, Timing ECO Methodologies, AOCV

Tcl Scripting, PTECO, AOCV, physical design flow, Tweaker, process variations, POCV analysis, SDC constraints, DFT modes, OCV, timing corners, primetime, high frequency blocks, Signal Integrity, Timing Closure, STA tool Tempus, full-chip STA closure, ECO implementation, DMSA, modes

synopsys primetime , Synopsys FusionCompiler, Timing Signoff Tools, Physical Design Flow, SDC Proficiency, AI ML Integration, Advanced Node Experience, Advanced Clocking

Perl scripting, Synthesis, Physical Design, primetime, Functional and DFT modes, Flow automation, SoC design and implementation methodology, Constraint development, Digital ASIC design

Synthesis Flow setup, Tempus flows, LEC flow setup, Genus flows, Synthesis flows, STA timing ECOs, STA flow setup, Constraints clocks, timing convergence, STA flows, Post-Scan Synthesis netlist, STA timing checks