Sr Principal Software Engineer

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique One Cadence - One Team culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other every day.

Job Summary:

• We are looking for 14+ years of experience having the following skillset:
• Strong RTL design fundamentals using HDLs like VHDL/Verilog/System verilog
• Strong understanding of AMD (Xilinx) ultrascale, versal FPGAs architecture and use of vivado for FPGA place and route.
• Constraints definitions for FPGAs. Doing Static Timing Analysis.
• Familiarity with FPGA prototyping or emulation is a plus.
• Passionate to learn and explore new technologies and demonstrates good analysis and problem-solving skills.
• Good written and verbal communication skills, should be a quick learner and a team player.