Job description
Roles and Responsibilities
- Good experience in PD execution of multiple medium to High critical blocks/HMs from Netlist to GDSII
- Develop and qualify the methodology and implementation flow in advanced technologies like 14nm and below.
- Well versed with FC/Innovus tools and good understanding of place/cts/Route critical settings
- Develop expertise in ASIC Synthesis, Floor Planning, STA (Static Timing Analysis), and other relevant technologies.
- Good experience in Low power designs
- Conduct thorough analysis of designs to identify potential issues and implement solutions.
- Perform physical design activities including floor planning, PNR (Physical Netlist) creation, and timing closure using Innovus tools.
