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Sr. DFT Engineer

Sr. DFT Engineer

Nxp Semiconductors
Fresher
Not Disclosed

This job is no longer accepting applications

Job Description

Design For Test (DFT) Engineer (Experienced)

We are looking for an experienced DFT Engineer with strong expertise in scan, ATPG, and test methodologies for complex digital designs. The candidate will be responsible for implementing and validating DFT architectures to ensure high test coverage and quality silicon.

Key Responsibilities

  • Define and implement DFT architecture including scan, MBIST, and boundary scan.
  • Perform scan insertion, chain stitching, and compression techniques.
  • Generate and analyze ATPG patterns to achieve high fault coverage.
  • Debug and resolve DFT-related issues across design and silicon stages.
  • Work closely with RTL, Physical Design, and STA teams for smooth integration.
  • Support pattern validation, gate-level simulations, and silicon bring-up.
  • Ensure compliance with DFT and testability requirements.

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Key Skills

chain stitching

gate-level simulations

compression techniques

pattern validation

DFT architecture

silicon bring-up

testability requirements

fault coverage

About Company

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Noida, India
Skills:
Test Methodologies, RTL Physical Design, silicon bring-up, pattern validation, ATPG patterns, gate-level simulations, Sta, DFT architecture, compression techniques, DFT and testability requirements, DFT-related issues, chain stitching, scan ATPG, Scan Insertion