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Role: SoC Verification Engineer
Location: Bangalore
Experience: 4+ Years
Notice Period: Immediate Joiners to 30 Days Preferred
Job Description:
✔ Strong experience in SoC/ASIC Verification
✔ Hands-on expertise in SystemVerilog / UVM
✔ Experience in developing test plans, test benches, and verification environments
✔ Knowledge of protocols/interfaces such as AXI, AHB, APB, PCIe, USB, etc.
✔ Debugging skills with simulators and waveform tools
✔ Exposure to coverage-driven verification and regression management
✔ Good understanding of RTL design concepts
Job ID: 149137855
Skills:
Debugging Tools, Perl, Python, Tcl, Uvm, systemverilog, LPDDR4, Axi, DDR verification, DDR protocols, DDR5, DDR4, AHB, LPDDR5
Skills:
Tcl, Python, Ovm, Vcs, Perl, Questa, Uvm, systemverilog, Modelsim
Skills:
C, Spi, Shell, Verilog, I2c, System Verilog, Python, Uart, Can, Flexray, Perl, Ethernet, Cadence Tools, Xcelium, Uvm, UPF, GLS, safety simulator, VHDL, vManager, Formal applications, AMs, Axi, PSI5, APB, PAGLS, CPF, AHB
Skills:
C, Verilog, Uvm
Skills:
Verification Methodologies, NVME architecture, PCIe transport and link layers, Post silicon debug, SoC Verification, C based SoC verification, Simulation, Testbench architecture, Pattern generation
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