Debugging Tools, Perl, Python, Tcl, Uvm, systemverilog, LPDDR4, Axi, DDR verification, DDR protocols, DDR5, DDR4, AHB, LPDDR5

Tcl, Python, Ovm, Vcs, Perl, Questa, Uvm, systemverilog, Modelsim

C, Spi, Shell, Verilog, I2c, System Verilog, Python, Uart, Can, Flexray, Perl, Ethernet, Cadence Tools, Xcelium, Uvm, UPF, GLS, safety simulator, VHDL, vManager, Formal applications, AMs, Axi, PSI5, APB, PAGLS, CPF, AHB

C, Verilog, Uvm

Verification Methodologies, NVME architecture, PCIe transport and link layers, Post silicon debug, SoC Verification, C based SoC verification, Simulation, Testbench architecture, Pattern generation

Performance Analysis, Linux drivers, workload characterization, systemverilog, CPU GPU benchmark characterization, performance analysis tools, SOC design verification, runtime, mobile SOC performance model development

Mac, Pcie, Switch, 1G Ethernet, UFS, SV, XUSB, High Speed IO verification, verification tools for simulation and debug, Uvm

arm architecture , Usb, DDR, Pcie, Perl, Python, Shell Programming, Tcl, Arm core, GIC, SMMU, Dms, Arm system IP, SoC Verification

x86 assembly language , C, Perl, Ovm, Arm, Python, SVTB, CPU Architecture, Uvm, Power Management Verification