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As a Functional Verification Engineer, a typical day involves designing and implementing comprehensive testbenches to ensure the functional accuracy of digital designs at both block and system levels. The role requires creating various types of tests, including constrained-random, directed, and coverage-driven, to thoroughly validate the design. Collaboration with design and architecture teams is essential to identify potential corner cases and guarantee exhaustive functional coverage prior to tape-out. This position demands a proactive approach to problem-solving and continuous communication across multiple teams to maintain high-quality verification standards throughout the project lifecycle.
Roles & Responsibilities:
- Expected to be an SME, collaborate and manage the team to perform.
- Responsible for team decisions.
- Engage with multiple teams and contribute on key decisions.
- Provide solutions to problems for their immediate team and across multiple teams.
- Lead efforts to identify verification gaps and propose innovative strategies to enhance test coverage.
- Mentor junior team members to develop their skills and ensure alignment with project goals.
- Coordinate cross-functional reviews to align verification objectives with design specifications.
Professional & Technical Skills:
- Must To Have Skills: Proficiency in SoC Verification.
- Strong knowledge of testbench development methodologies and verification languages such as SystemVerilog and Universal Verification Methodology.
- Experience in creating and executing constrained-random, directed, and coverage-driven tests to validate complex digital designs.
- Ability to analyze functional coverage metrics and identify coverage holes to improve verification completeness.
- Familiarity with simulation tools and debugging techniques to efficiently isolate and resolve design issues.
- Capability to collaborate effectively with design and architecture teams to understand design intent and verify corner cases.
Artech is the largest Women & Minority owned IT staffing firm in the US, with US$ 800 million annual revenue run rate in 2021 and a footprint across the globe. With nearly three decades of experience, Artech empowers businesses through applied human intelligence and offers a spectrum of services that include Workforce Solutions (Contingent Staffing, Bulk/ Project Staffing, Master Vendor, RPO, Direct Hire and Payroll Transition) and Project-Based Solutions (Digital Experience, Technical Operations, Technical Development, Business Operations & Digital Platforms). Artech works with over 90 Fortune 500 clients across USA, Canada, India, and China.
At Artech, we are empowering talent by connecting potential with opportunities through applied human intelligence. We empower our teams to maximize the impact of their intellect, through a performance oriented, diverse, flexible, and inclusive work environment supported by our continuous learning and development focus.
Job ID: 153051931
Skills:
arm architecture , ACE lite or CHI bus protocols, CPU architecture, Coherent and non-coherent fabric IPs and protocols, PCIe Controller PHY IPs and protocols, DDR protocols, emulation constraints, pre-silicon SoC verification, Memory Controller PHY IPs, performance verification
Skills:
System Verilog, Functional safety tests, Connectivity Checking, Power-aware verification, coverage analysis, Gate-Level Simulations, Post-Silicon Validation, Uvm, Analog mixed-mode AMS simulations, Coverage-driven verification, Fault injection simulations, AMBA bus protocols, Functional assertions, RTL Gate level verification, Axi, formal verification, APB, ISO 26262, TB development, Module level verification plan development, Property Checking, AHB, SoC Verification
Skills:
Ovm, Debugging, Test Planning, CHI, SoC design verification, AMBA protocols, Uvm, UVM-based test benches, system simulation tools, Axi, APB, emulation models, AHB
Skills:
C, Verilog, Scripting, RTL testbench debug, interconnects, memory hierarchy, Arm-based SoC architecture, Uvm, UPF, systemverilog, coverage closure, coherency
Skills:
SoC Verification, systemverilog, universal verification methodology