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About The Role
You will be part of Intel Data Center and AI group driving Intel's latest AI SoCs in the World's leading process technologies. In this role you will be responsible to develop SoC / SS pre-Silicon functional verification environment along with a team of highly skilled engineers to verify system level design . Your role spans end to end Pre-Silicon verification from verification architecture definition to PRQ/ customer support.We're looking for a highly motivated, Pre-Silicon Verification Lead Engineer who will be responsible to :
Define Verification architecture that is scalable across multi level verification for most advanced multi die SoCs
Define domain level verification plan
Develop VIPs, protocol checkers, scoreboards.
Define coverage, assertion based verification methodologies.
Work directly with hardware architects, logic designers to influence overall SoC and system design.
Mentor and technically lead junior engineers.
Qualifications
Candidate should have a Bachelors/ Masters in Electrical or Computer Science Engineering or related field with 15+ years of technical experience.
Related technical experience should be in/withSilicon Design and/or Validation/Verification.Preferred QualificationsExperience in CPU/ GPU verification
Experience with SV/ UVM Language
Experience with Formal verification techniques is a plus
Strong background in scripting - PERL/Python
System hardware and software debug skills
Understanding of software hardware co-validation techniques
Solid understanding of system and processor architecture, advanced memory and IO technologies
Job ID: 107708899
Skills:
Tcl Scripting, Python, System Verilog, HW–SW interaction, SoC TB architecture, test-plan creation, UPF-based methodologies, debug skills, UVM methodology, RTL integration, DV sign-off flows, gate-level simulation, power-aware verification
Skills:
Pcie, Ovm, Scripting, System Verilog, Ethernet, Uvm, HBM2, HBM3, Memory protocols, GDDRx, SVA, AHB, LPDDR4, AMBA standards, APB, High speed SerDes, Axi
Skills:
Ovm, System Verilog, RTL Debugging, Uvm, GPU architecture understanding, Test Bench bring-up, Emulation environments, Simulation environments, Test Plan development
Skills:
System Verilog, SoC Verification, Rtl Design, Design Verification, Uvm, Asic verification
Skills:
Vcs, Perl, Python, Tcl, Debugging methodologies, Verdi, Assertions SVA, Xcelium, Uvm, ASIC SoC Verification Flows, systemverilog, Coverage-driven verification, spyglass, Simulation and regression flows, Jenkins Regression Automation Tools, DVE, Questa, Functional Verification
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