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ScaleFlux

SoC Design Engineer - CPUSS (BLR/Pune)

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  • Posted 5 days ago
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Job Description

About the Company

Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley.

About the Role

As the Staff SOC Design Engineer responsible for designing complex SOC using ARM architecture, you will work to understand the internal requirements and complexities of our SOC system and architect the SoC.

Responsibilities

  • Help design the SoC RTL, Integrate IPs and define top level logic.
  • Work with verification team to make sure that high quality verification is achieved for first pass success of SoC.
  • Participate in architecture/product definition through early involvement in the product life-cycle.

Qualifications

  • Minimum BE/BS degree (Masters preferred) in Electrical/Electronics Engineering/VLSI with 8+ years of practical experience.

Required Skills

  • Strong fundamentals in digital ASIC design.
  • Expertise in ARM v8 and v9 specifications and their impact to SoC system architecture.
  • Multiple project experience with ARM based ecosystem components (A-series/R-Series ARM Cores, SMMU, GIC, Coresight, NIC, Low latency and other complex bus interconnects).
  • Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC designs.
  • Strong experience with Verilog, SystemVerilog, DC/DC-T based synthesis, constraints development and RTL level checks. Low power methodology knowledge will be a plus.
  • Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART.
  • Capable of working with multiple IP vendors and other teams.
  • Excellent communication skills.

Preferred Skills

  • Experience with emulation and firmware teams to debug silicon functional issues.
  • Build SoC around key ARM subsystem components and other IPs including various interfaces.
  • Design of clock-reset architecture and RTL implementation.
  • Integration of all IPs into SoC.
  • Work with verification team for complete SoC verification, review test plans.
  • RTL Simulation and debug.
  • Synthesis, Lint, CDC checks.
  • Working with emulation team - FPGA to understand the system failures and provide solutions.

Pay range and compensation package

Location:

Bangalore and Pune

Equal Opportunity Statement

We are committed to diversity and inclusivity.

More Info

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About Company

Job ID: 145170533