Job Title: Senior Physical Design Engineer
Experience: 5+ Years
Location: Bengaluru
Employment Type: Full-Time
Job Description
We are looking for an experienced Senior Physical Design Engineer with 5+ years of hands-on experience in full-chip and block-level physical design. The ideal candidate will have strong expertise across the PD flow, from floorplanning to GDSII, and the ability to work closely with cross-functional teams to deliver high-quality silicon.
Key Responsibilities
- Handle end-to-end physical design flow: Floorplanning, Placement, CTS, Routing, and Sign-off
- Perform timing closure (Setup/Hold), congestion analysis, and power optimization
- Conduct Physical Verification: DRC, LVS, ERC, and Antenna checks
- Work on low-power designs including UPF/CPF implementation
- Perform IR Drop and EM analysis using industry-standard tools
- Collaborate with RTL, STA, DFT, and Foundry teams to resolve design issues
- Optimize design for PPA (Power, Performance, Area) targets
- Debug and resolve complex physical design challenges at advanced nodes
Required Skills & Qualifications
- 5+ years of experience in Physical Design for ASIC/SoC
- Strong hands-on experience with industry EDA tools (Synopsys ICC2 / Cadence Innovus / Mentor Calibre)
- Solid understanding of ASIC design flow and advanced technology nodes (28nm/16nm/7nm or below)
- Expertise in STA concepts, timing constraints, and closure methodologies
- Experience with low-power methodologies and multi-voltage designs
- Strong scripting skills in TCL, Perl, or Python
- Good understanding of PDK, tech files, and foundry rules
Preferred Qualifications
- Experience with advanced nodes (7nm/5nm/3nm)
- Knowledge of DFT and Scan implementation
- Experience in high-performance or low-power SoC designs
- Strong problem-solving and debugging skills
Education
- Bachelor's or Master's degree in Electronics & Communication Engineering, Electrical Engineering, VLSI, Microelectronics, or a related field
- Strong academic background in VLSI Design, Digital Electronics, Semiconductor Physics, and ASIC Design concepts
