Senior Physical Design Engineer

Company Description

Adroitec Systems, headquartered in Bangalore, is a specialized design and services company focused on delivering top-tier solutions to its clients. With a team of highly skilled developers, Adroitec is dedicated to providing end-to-end solutions in the chip design space, covering the entire process from RTL design to GDS. The company prioritizes optimizing PPA metricsPower, Performance, and Areawhile ensuring timely delivery and continuous project updates. With over 50 combined chip tape-out experiences, Adroitec offers a range of services, including physical design, physical verification, DFT, timing, and mission-critical tapeout tasks, as well as turnkey project execution and resource augmentation.

Role Description

• 5-10 years of experience in ASIC Physical Design
• Have good knowledge of the entire physical design process from floorplan to GDSII generation
• Have hands-on experience in the latest sub-micron technologies below 10 nm
• Handson experience in leading PnR tools Synopsys ICC/ICC2, Innovus
• Experience in low power designs and handling congestion or timing critical tiles will be preferred
• Should be a quick learner and have good attention to detail
• Scripting skills in Perl/Tcl/Python etc
• Must have good communication & problem-solving skills.
• Should be able to handle PnR tasks with minimal supervision

Please share me your resumes to below mentioned mail id:

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