Senior Engineer Verification
- Posted 2 months ago
- Be among the first 20 applicants
Job Description
Your Role
Key responsibilities in your new role
Qualifications And Skills To Help You Succeed
[Confidential Information]
#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in
We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.
Key responsibilities in your new role
- Take responsibility of developing SV RNM models and its verification against schematic.
- Developing automatic checkers
- Gain knowledge on AMS methodologies/Simulators
- Take responsibility of analog vectors (test parameters) verification at SoC level using DMS verification flow involving UVM testbench and RNM models.
- Knowledge on Scripting.
Qualifications And Skills To Help You Succeed
- Mixed signal verification engineers responsible for AMS verification of Multi phase controllers, power switches.
- Development of SV RNM models for analog blocks like ADC, buck-boost controller, ldo etc.
- Verification of SV RNM models against schematic.
- Verification of analog vectors at SoC (DMS verification flow involving UVM, SV RNM)
- Good understanding on EDA tools/simulators (Cadence - virtuoso schematic editor, Xcelium,APS/XPS).
- Good understanding of analog design concepts
- Automation using shell/Perl/Python script.
- Self-motivated to work effectively & should be able to handle work independently.
[Confidential Information]
#WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.
Are you in
We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are. At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities. We base our recruiting decisions on the applicant´s experience and skills. Learn more about our various contact channels.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.
Click here for more information about Diversity & Inclusion at Infineon.
More Info
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Key Skills
About Company
Skills:
arm architecture , C, Soc Architecture, Embedded Software, Verilog, Firmware, CPU architecture, scripting in Python, Emulation, Simulation, AMBA protocols, systemverilog, Assembly
Skills:
Verilog, Sata, Python, Perl, Usb, DV methodologies, Uvm, constrained random verification, functional coverage, PCI Express, VMM, systemverilog
Skills:
Python, Scipy, Pytest, Git, Numpy, AI coding assistants, unittest
Skills:
Xpath, C++, Gcc, Xslt, Sql, Git, Linux, Xml, Javascript, System Verilog, Python, Assembly languages, SGE or other DRMS, Uvm, HTML DOM, LLVM, SVA
Skills:
Ovm, Perl scripting, Verilog, Post-silicon bring-up HW-SW debug, AXI protocol, DDR PHY architecture, Uvm, JEDEC standards, systemverilog, DFI protocol, LPDDR4, debug and root-cause skills, SS SoC post-silicon issues, AHB, LPDDR5