C, Soc Architecture, Verilog, Python, Debugging, Perl, CPU architecture, Assembly, Simulation, Emulation, systemverilog, Verification fundamentals, AMBA protocols

Computer Architecture, Perl, Debugging, Python, Formal Verification methodologies, IP SOC verification, Functional Verification, Uvm, systemverilog, Rtl Design

cache coherency , Scripting, Noc, DDR, C Programming, Performance Verification, RTL environments, SystemC TLM simulation, TLV CI flow, UVM VIPs, Performance simulation tools, systemverilog, Coresight, Formal connectivity verification, Memory hierarchy, VHDL, RTL debugging, Gate level simulation, Interconnect architectures, ASIC Top level verification, Hardware emulation