Senior DFT Engineer
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Job Description
Senior DFT Engineer – Automation & Scripting
Experience: 3 to 5 Years
Location: Bangalore
Job Description:
We are seeking a DFT Engineer with strong expertise in automation and scripting to support and enhance DFT flows across IP and SoC programs. The role involves developing scalable automation solutions, improving productivity, and enabling seamless integration of DFT methodologies.
Key Responsibilities:
- Develop and maintain automation frameworks for DFT flows across multiple projects.
- Create scripts for scan insertion, ATPG, pattern generation, pattern validation, and coverage analysis.
- Automate report generation, data parsing, and quality checks for DFT deliverables.
- Work with DFT and implementation teams to streamline and optimize existing flows.
- Support simulation, LEC, and GLS runs through automation.
- Build reusable utilities for debug, regression management, and environment setup.
- Enable continuous integration (CI) based DFT execution flows (good to have).
- Collaborate with cross-functional teams for flow deployment and issue resolution.
Required Technical Skills:
- Strong scripting expertise in Python / Perl / Tcl / Shell (at least one or more).
- Good understanding of DFT fundamentals:
- Scan architecture
- ATPG
- Scan compression
- MBIST / LBIST (basic exposure)
- Hands-on experience with industry tools such as:
- Synopsys DFT Compiler / TetraMAX / TestMAX
- Cadence Modus (good to have)
- Experience in log parsing, report automation, and flow orchestration.
- Familiarity with Linux/Unix environment and revision control systems (Git/SVN).
- Basic knowledge of Verilog/SystemVerilog.
Nice to Have:
- Exposure to IJTAG / IEEE 1687 / 1500
- Experience with Makefile, regression frameworks, or CI/CD pipelines
- Understanding of SoC level DFT integration flows
- Debug support for GLS / pattern simulation failures
Soft Skills:
- Strong analytical and problem-solving skills.
- Good communication and ability to work in a fast-paced environment.
- Quick learner with a passion for automation and methodology improvement.
Education:
- BE / B.Tech / Electronics / Electrical / VLSI or related field.
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Key Skills
About Company
Skills:
Perl, Python, Logic Design, DFT Engineering, Uvm, Architecture Verification, Testplan Development, IOBIST Test-logic, Industry-standard Verification Flows, Constrained Random Testing, Automation Flow Development, Profiling Tools, Pre-Silicon Simulation and Debug, Coverage Metrics
Skills:
DFT strategies, Tessent, EDA Tools, ATPG pattern generation, MBIST, Cadence, Synopsys, IJTAG, Scan compression
Skills:
Memory BIST, TetraMax, DRC Coverage, SSN, occ, Dft, ICL, Scan Insertion, ATPG, pdl, Debug, Simulation, Sms, Synopsys, IJTAG
Skills:
Scan, HDLs, MBIST, DFT architecture definition, Tempus, ATPG flow implementation, scripting skills in Perl, Genus, tessent DFT, JTAG boundary scan, Cadence digital implementation tools
Skills:
test mode timing constraints definition, Genus Synopsys, DFT concepts, Scan Insertion, Transition delay test coverage analysis, TetraMax, equivalence check DFT DRC rules, simulating test vectors, ATPG coverage analysis, Cadence Encounter Test, DFTMax, timing fixes corrective actions for timing violations, ASIC DFT