Senior DFT Engineer
- Posted 2 months ago
- Be among the first 10 applicants
Job Description
Senior DFT Engineer
Job Description
- PDL: Writing ICL and PDL by Own
- Debug protocols: Strong understanding on Jtag 1149.1-2013, ijtag - P1687
- Debug patterns exposure: .V, optional STIL or SVF
- SSN + SSH architecture understanding.
- Tessent tool exposure: TestKompress, Tessent shell
- Scripting: TCL, shell
Optional Skills (Good to have)
- SCAN architecture, past TAP/JTAG related DV feature.
- Patterns re-targetting
- Good Debug skills on the same.
Experience: 4 to 5 Years
Location: Bangalore
More Info
Job Type:
Industry:
Function:
Employment Type:
Key Skills
PDL Writing
STIL
SVF
.V
Tessent shell
SSN
Jtag 1149.1-2013
Tessent tool
Debug patterns
SSH architecture
Debug protocols
ijtag - P1687
Shell
About Company
Skills:
Unix, Report Automation, Svn, Git, Shell, Linux, Perl, Verilog, Python, Tcl, Cadence Modus, MBIST, log parsing, DFT fundamentals, TetraMax, systemverilog, Scan compression, Scan architecture, Synopsys DFT Compiler, flow orchestration, ATPG, LBIST, TestMAX
Skills:
Memory BIST, TetraMax, DRC Coverage, SSN, occ, Dft, ICL, Scan Insertion, ATPG, pdl, Debug, Simulation, Sms, Synopsys, IJTAG
Skills:
Scan, HDLs, MBIST, DFT architecture definition, Tempus, ATPG flow implementation, scripting skills in Perl, Genus, tessent DFT, JTAG boundary scan, Cadence digital implementation tools
Skills:
Dft, SDC, ATPG, Scan, MBIST, SSN, GLS