Senior Design Verification Engineer

Job Summary:

We are looking for a talented and motivated Design Verification Engineer with minimum 6 yrs of relevant experience to join our team and play a key role in ensuring the functionality and quality of our next-generation integrated circuits (ICs). This position offers the opportunity to work on challenging projects while utilizing your expertise in verification methodologies and tools

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Responsibilitie

• s:
  Develop and implement comprehensive verification plans using industry-standard methodologies (e.g., U
• VM)Design and write robust verification environments (testbenches) to achieve high code cover
• ageUtilize simulation tools (e.g., ModelSim, Cadence Incisive, Synopsys VCS) to verify RTL functional
• ityDebug and analyze verification failures to identify the root cause of design iss
• uesCollaborate with RTL design engineers to resolve functional bugs and ensure design revisions meet verification requireme
• ntsParticipate in code reviews and ensure adherence to verification coding standa
• rdsStay up-to-date with the latest verification tools and methodolog

ies
Qualificati

• ons:
  Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a
• plus)6-10 years of experience in design verification for ASICs or
• SoCsStrong understanding of digital design principles (combinational logic, sequential l
• ogic)Proven ability to develop and debug complex verification environ
• mentsProficiency in Verilog or VHDL with experience in verification methodologies (e.g.,
• UVM)Experience with simulation tools and scripting languages (e.g., Python, Perl) is a
• plusExcellent analytical and problem-solving s
• killsStrong communication and collaboration skills to work effectively in a team enviro

nment
Ben

• efits:Competitive salary and benefits p
• ackageOpportunity to work on leading-edge technologies and pr
• ojectsCollaborative and dynamic work envir
• onmentPotential for professional development and career advan