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SSOC Design Verification Engineer - Senior / Lead / Sr. Lead
Experience: 5 to 12 Years
Location: Hyderabad / Bangalore
Job Requirement
About Company
ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
www.acldigital.com
Job ID: 147225187
Skills:
Perl, Verilog, Python, Tcl, VHDL, Uvm, systemverilog
Skills:
Uart, python, Debugging, SV, test cases coding, Uvm, Test bench development, IJTAG, APB, Code and Functional coverage analysis, Axi, BUS Protocols
Skills:
Nvme, Usb, Shell, Tcl, Verilog, System Verilog, Ethernet, Python, Pcie, Perl, DDR, UPF Low Power Verification, System Verilog Assertions, Uvm, Linux development environments, CHI, formal verification, CXL, Axi, NLP Testbench Verification, ASIC design flows
Skills:
rtl verification , Verilog simulations, Sram, AI-assisted tools, Timing Analysis, DRAM, UVM Test Bench, SystemVerilog PLI coding
Skills:
arm architecture , C, Usb, DDR, Pcie, Ethernet, SoC DV execution, hardware emulation support, TLMs in SystemC, Uvm, assertion-based formal verification tools, HBM
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