Jobs
Services
Career Solutions
Featured profileProfile highlighterCareer BoosterBest SellerResume WritingLinkedin MakeoverAI Resume StudioAI Interview CoachAI Profile EdgeCareer Success Suite
Prep
Interview Preparation
Learn
Degree ProgramsCertificationGenAI CourseVskills Certifications
Career Advice
Please enter a job title/role/skill to search
Please enter a job title/role/skill to search
  • Fresher (< 1 year)

Search by job, company or skills

RTL Design Engineer
axiro semiconductor

RTL Design Engineer

axiro semiconductor
8-10 Years
Not Disclosed
  • Posted 2 months ago
  • Be among the first 10 applicants

Job Description

About Axiro Semiconductor

Axiro Semiconductor is a fabless semiconductor design company headquartered in Bengaluru, driving innovation in RF, wireless infrastructure, satellite communication (Satcom), and high-speed connectivity solutions. Backed by CG Power & Industrial Solutions Ltd. part of the 120-year-old Murugappa Group. Axiro represents India's leap into the global semiconductor arena. With millions of chips already powering global networks, a world-class team across India, the US, and Europe, and cutting-edge expertise spanning RF, mmWave, GaN, and next-generation communication technologies, Axiro is engineering the future of how the world connects, computes, and communicates.

Job Description

  • B.E./B.Tech. with 8+ years or M.S./M.Tech. with 5+ years in digital design.
  • Proven experience taking designs from spec to GDS.
  • Strong leadership and project management skills to guide DFT, verification, and physical design teams.
  • Excellent communication and collaboration with RF/Analog leads for spec development.
  • Deep expertise in digital design flow: RTL, synthesis, constraints, formal verification, DFT, STA, and verification.
  • Proficient in digital concepts: register maps, state machines, CDCs, timing constraints.
  • Familiar with communication protocols (SPI, I2C, I3C) and memory integration (SRAM, EFuse, EEPROM).
  • Working knowledge of physical design, ECOs, DFT, and UVM.
  • Skilled in RTL development and understanding legacy code.
  • Strong documentation, teamwork, and cross-functional collaboration.
  • Self-driven, motivated, and capable of leading multidisciplinary teams.

More Info

Job Type:
Permanent Job
Industry:
Semiconductor Manufacturing
Function:
Semiconductor
Employment Type:
Full time

Key Skills

Uvm
Timing Constraints
state machines
Sram
Physical Design

memory integration

digital concepts

EFuse

Sta

register maps

CDCs

I3C

formal verification
rtl development
Communication Protocols
Verification

RTL synthesis

Dft
Digital Design
Ecos
Spi
I2c
Eeprom

About Company

Last Updated: 07-09-2026 09:26:54 PM

Similar Jobs

RTL Design EngineerHCL TechBee
5-11 yrs
Bengaluru, India
Skills:
Perl, Shell scripting, Python, Sta, SDC constraints, RTL design using Verilog, ASIC SoC development, Timing Analysis, systemverilog, digital design concepts, VHDL, Functional Verification, RTL debugging, UVM-based verification environments, Timing Closure, synthesis flows
RTL Design Engineer - Security /StaffQualcomm
Q
2-12 yrs
Bengaluru, India
Skills:
C, Clearcase, Cryptography, Aes, Encryption, Clearquest, Perl, Verilog, Python, System Verilog, LINT, cdc, RTL design using Verilog, hash functions, GMAC, signatures, LEC, SHA, private key, ASIC development tools, random number generator
RTL Design EngineerQTiMinds Private Limited
3-8 yrs
₹ 4.5 - 15 LPA
Bengaluru, Hyderabad
Skills:
Verilog, Fpga, VHDL, systemverilog, ASIC Design, Synthesis Tools, Timing Analysis, Verification Methodologies, Physical Design, low power design
Lead RTL design EngineerAMD Telecom
8-10 yrs
Bengaluru, India
Skills:
Soc Architecture, Physical design interaction, SoC integration, Formal verification techniques and tools, Verilog RTL development, UPF and low-power methodologies
CPU RTL Design Engineerleadsoc technologies pvt ltd
5-10 yrs
Bengaluru, India
Skills:
Debugging, Verilog, Computer Architecture, LINT, cdc, RTL simulation, Execution units, Synthesis-aware coding, Caches, RISC-V ISA, CPU microarchitecture, systemverilog, Rtl Design, Memory hierarchy, CPU pipelines, CPU performance optimization, RTL quality checks, Instruction decoding, Microarchitectural trade-offs, ARM processor architecture, formal verification