RTL Design Engineer
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Job Title: RTL Design Engineers
Exp Level: 2-3 yrs
Loctaion: Hyderabad
Job Description:
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Job ID: 153637511
Skills:
conformal lec , Perl, Verilog, Python, Tcl, VC spyglass, IPXACT, IORING, LINT, Formality, VSI, UPF, Design Partitioning, Phys GPIOs, SoC IP level Integration, RTL Coding
Skills:
Verilog, LINT, Synthesis, spyglass, cdc, RDC, Timing, Ethernet protocols IP, PPA optimization, RTL optimization, systemverilog
Skills:
Perl, Verilog, Python, Makefiles, RTL Build flows, Chip Design Functions, SoC Verification, Physical Design, Rtl Design, Dft, Synthesis, System-On-Chip design implementation flow
Skills:
Rtl Design, UFS, Octal SPI, RTL quality checks, SOC integration, SDIO
Skills:
Automation Frameworks, Sta, LINT, Memory operation, Synchronous design concepts, power analysis, SoC design flows, CMOS Circuit Design, Rtl Design, spyglass, Synthesis, device physics, CDC methodologies
