Search Jobs
Search by job, company or skills
Search by job, company or skills
Job Title: RTL Design Engineers
Exp Level: 4+ yrs
Loctaion: Hyderabad
Job Description:
• RTL coding knowledge
• Top-level (SOC) level basic industry standard Arch knowledge
• SoC & IP level Integration knowledge
• IPXACT knowledge
• IORING and Phys & GPIOs basic functionality
• Design Partitioning(Tilification) knowledge
• Design RTL quality checks:
• Tools knowledge:
• Design and scripting languages:
Job ID: 144789417
Skills:
Perl, Verilog, Python, Tcl, VHDL, Static Verification, systemverilog, Rtl Design
Skills:
Perl, Verilog, Python, Tcl, VHDL, Static Verification, systemverilog, Rtl Design
Skills:
LINT, Sta, Synchronous design concepts, Memory operation, power analysis, SoC design flows, CMOS Circuit Design, Rtl Design, Synthesis, spyglass, device physics, CDC methodologies
Skills:
memory controllers , Verilog, Flash, Ddr3, Sta, CHI, Memory, clocking system modes, Rtl Design, Security, physically aware design flows, power management, LPDDR, Bunch-of-wires, Synthesis, multi-clock domain architectures, power optimization techniques, Debug, D2D protocols, UCIe, systemverilog, Rom, Axi, Timing Closure, low-power design techniques, AHB, Ram
Skills:
Unix, Python, Shell, Linux, Skill, SoC Integration, Rtl Design
We don’t charge any money for job offers
