R&D Engineering, Sr Staff Engineer - Physical Design

What You ll Need:

• BS or MS in EE with 10+ years of hands-on experience developing high-speed digital IP cores and/or SOCs.
• Knowledge of IP deliverables, ASIC implementation and physical design flow and tools, memories, logic libraries, and PDK versions.
• Direct hands-on experience with Fusion Compiler or industry equivalent Synthesis and Place & Route tools.
• Ability to facilitate cross-functional collaboration, including fostering innovation, improving communication, and driving results.
• Good analysis, debugging, and problem-solving skills.
• Solid written and verbal communication skills and the ability to create clear and concise documentation and provide trainings.
• Familiarity with other Synopsys tools (Primetime, PrimePower, RLTA, CoreTools) is a plus.
• Working knowledge of high-speed interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR is a plus.