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Are you looking for a unique opportunity to be a part of something great Want to join a 17,000-member team that works on the technology that powers the world around us Looking for an atmosphere of trust, empowerment, respect, diversity, and communication How about an opportunity to own a piece of a multi-billion dollar (with a B!) global organization We offer all that and more at Microchip Technology Inc.
People come to work at Microchip because we help design the technology that runs the world. They stay because our culture supports their growth and stability. They are challenged and driven by an incredible array of products and solutions with unlimited career potential. Microchip's nationally-recognized Leadership Passage Programs support career growth where we proudly enroll over a thousand people annually. We take pride in our commitment to employee development, values-based decision making, and strong sense of community, driven by our we affectionately refer to it as the and it's won us countless awards for diversity and workplace excellence.
Our company is built by dedicated team players who love to challenge the status quo we did not achieve record revenue and over without a great team dedicated to empowering innovation. People like you.
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Job Description:
The Mixed Signal Development Group is responsible for delivering high-speed analog and mixed-signal IP to divisions within Microchip. We work with leading edge CMOS processes to produce analog integrated circuits for wireline applications. From PCIe to 128+Gb/s SERDES, we enable technology that allows Microchip's products to interface to the outside world.
As a member of the Mixed-Signal Development Group, the candidate will be supervised by a team manager, and be engaged in the package design and layout.
Responsibilities:
Requirements/Qualifications:
Microchip Technology Inc. is a publicly-listed American corporation that manufactures microcontroller, mixed-signal, analog and Flash-IP integrated circuits.
Job ID: 151738291
Skills:
Perl, Python, Tcl, Ansys RedHawk, Static and dynamic IR analysis, Power integrity analysis, Cadence Voltus, Power grid optimization
Skills:
logic bist , Usb, Perl, Pcie, Shell scripting, Static Timing Analysis, Python, Tcl, Memory BIST, Mentor, Cadence, IEEE 1149.1 JTAG, IEEE 1500, Analog Mixed-Signal test structures, DFT architecture, ATPG, EDA Tools, IEEE 1687 IJTAG, Siemens, Synopsys
Skills:
boundary scan , Jtag, Perl, Python, Tcl, Sta, test coverage analysis, MBIST, Diagnosis, TAP Controller, Scan Insertion, Fault Models, Physical Design, ATPG, Scan Compression, LBIST, pattern generation, Mentor Tessent
Skills:
Pcie, Perl, Verilog, Python, spyglass, VHDL, DDR memory controllers, CXL
Skills:
Perl, Static Timing Analysis, Python, Tcl, Timing Closure STA, RTL-to-GDSII Execution, power analysis, Red Hawk, Programming Scripting, Fusion Compiler, Signal Integrity Analysis, Cross-Functional Collaboration, Tempus, LEC, Physical Formal Verification, primetime, Innovus, Calibre, PPA Optimization, EDA Tools, VCLP