Principal Engineer
- Posted a month ago
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Job Description
Location: Bangalore
Experience: 10+ Years
Role Type: Senior Leadership
Role Objective
We are looking for a high-caliber VLSI expert with a minimum of 10 years of experience to lead our technical evolution. This role is a strategic blend of Research & Development (R&D) and Education. You will be responsible for architecting the future of our technical curriculum, creating high-level content, and delivering expert-led corporate training sessions.
We place a high premium on career stability; we are looking for a professional with a proven track record of long-term commitment and growth within their previous organizations.
Key Responsibilities
R&D & Curriculum Architecture: Drive R&D initiatives to keep our training programs at the bleeding edge of semiconductor technology. Design modular curricula covering the full ASIC lifecycle.
Content Creation: Develop sophisticated technical documentation, case studies, and lab manuals.
Corporate Training: Act as the lead instructor for high-profile corporate clients, translating complex RTL/PD concepts into actionable engineering knowledge.
Project Leadership: For candidates coming from an academic background, you must demonstrate the successful execution of at least one major end-to-end VLSI project.
Team Management: Lead and mentor a team of engineers and content developers, ensuring technical accuracy and pedagogical excellence.
Core Competencies & Technical Skills
Domain Expertise: Mastery in at least two of the following: RTL Design, Verification, or Physical Design (PD).
Verification: Hands-on experience with SystemVerilog (SV) and UVM (highly preferred).
Design Validation: Deep understanding of functional coverage, Assertions (SVA), and Timing Constraints (SDC).
Industry Experience: Direct experience in a product or services-based semiconductor company is considered a significant advantage.
Candidate Profile
Experience: 10+ years of solid experience in the VLSI industry or specialized academia.
Stability: Demonstrated history of consistent professional growth without frequent job-hopping.
Leadership: Proven ability to manage teams and handle project lifecycles from spec to GDSII.
Communication: Exceptional ability to articulate technical nuances to both seasoned engineers and learners.
Experience: 10+ Years
Role Type: Senior Leadership
Role Objective
We are looking for a high-caliber VLSI expert with a minimum of 10 years of experience to lead our technical evolution. This role is a strategic blend of Research & Development (R&D) and Education. You will be responsible for architecting the future of our technical curriculum, creating high-level content, and delivering expert-led corporate training sessions.
We place a high premium on career stability; we are looking for a professional with a proven track record of long-term commitment and growth within their previous organizations.
Key Responsibilities
R&D & Curriculum Architecture: Drive R&D initiatives to keep our training programs at the bleeding edge of semiconductor technology. Design modular curricula covering the full ASIC lifecycle.
Content Creation: Develop sophisticated technical documentation, case studies, and lab manuals.
Corporate Training: Act as the lead instructor for high-profile corporate clients, translating complex RTL/PD concepts into actionable engineering knowledge.
Project Leadership: For candidates coming from an academic background, you must demonstrate the successful execution of at least one major end-to-end VLSI project.
Team Management: Lead and mentor a team of engineers and content developers, ensuring technical accuracy and pedagogical excellence.
Core Competencies & Technical Skills
Domain Expertise: Mastery in at least two of the following: RTL Design, Verification, or Physical Design (PD).
Verification: Hands-on experience with SystemVerilog (SV) and UVM (highly preferred).
Design Validation: Deep understanding of functional coverage, Assertions (SVA), and Timing Constraints (SDC).
Industry Experience: Direct experience in a product or services-based semiconductor company is considered a significant advantage.
Candidate Profile
Experience: 10+ years of solid experience in the VLSI industry or specialized academia.
Stability: Demonstrated history of consistent professional growth without frequent job-hopping.
Leadership: Proven ability to manage teams and handle project lifecycles from spec to GDSII.
Communication: Exceptional ability to articulate technical nuances to both seasoned engineers and learners.
More Info
Key Skills
Functional coverage
Assertions SVA
SystemVerilog SV
Timing Constraints SDC
Physical Design PD
About Company
Skills:
conformal lec , Clp, Perl, Python, Tcl, Fusion Compiler, Formality, LEC, MCMM methodologies, UPF, Cadence Genus, Synthesis, Synopsys Design Compiler, RTL-to-GDS, CPF, Low Power Verification
Skills:
ALM, JIRA, Selenium, Agile Scrum development process, Test Architecture, Iso 14971, IEC 62304, test automation frameworks, medical device software development, verification strategies
Skills:
UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), C, C++, Shell, Pcie, Perl, Arm, Python, Tcl, Systemc, MCU, Hardware Emulation Platforms, RISC-V, UCIe, systemverilog, Verification Methodology, AMBA, Axi, Formal Model Equivalence Checking Tools, formal verification, VC Formal
Skills:
static timing analysis, Perl, Verilog, Python, Tcl, Rtl Design, Synthesis, Dft, ATPG, systemverilog
Skills:
needs assessment , Ms Office, Optioneering, Infoworks ICM, Urban drainage modelling, Model verification, Waste water modelling, Gis Software