Embedded Software, Rtl Design, Technical Specifications, IP selection strategies, Verification

Testing, software verification, software validation

Pcie, Verilog, Ethernet, Prototyping, Python, Scripting, Tcl, UCIe chiplet interconnects, AI tools, cdc, area optimization, Emulation, systemverilog, high-speed IO protocols, Rtl Design, formal verification, RDC, LINT, Timing Closure, silicon bring-up, CXL, micro-architecture, power efficiency

static timing analysis, Python, Verilog RTL, Genus Design Compiler, scripting or programming languages, DFT methodologies, high-speed SerDes, ASIC synthesis, Asic Physical Design, physical verification DRC LVS, 3DIC implementation methodologies, Cadence Virtuoso, RTL Compiler, place-and-route Encounter Innovus ICC, Clock Tree Synthesis

Low-power Implementation, Physical Verification, Physical Design, Timing Closure, Floor Planning, EDA Tools, Power Grid Design, Power Planning

System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools

arinc 653 , arinc 429 , Embedded Software Development, Requirements Engineering, AFDX, ARP4754A, verification methodologies, ARINC 615A, DO-178, aerospace software certification standards, software verification and validation strategies, avionics communication protocols, software lifecycle processes

System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools