Principal Engineer, ASIC Development Engineering (SoC Validation)

Company Description

Sandiskunderstands how people and businesses consume data and we relentlessly innovate to deliver solutions that enable today's needs and tomorrow's next big ideas. With a rich history of groundbreaking innovations in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we're living in and that we have the power to shape.

Sandiskmeets people and businesses at the intersection of their aspirations and the moment, enabling them to keep moving and pushing possibilityforward. We do this through the balance of our powerhouse manufacturing capabilities and our industry-leading portfolio of products that are recognized globallyforinnovation, performance and quality.

Sandiskhas two facilities recognized by the World EconomicForum as part of the Global Lighthouse Networkforadvanced 4IR innovations. These facilities were also recognized as Sustainability Lighthousesforbreakthroughs in efficient operations. With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world movingforward.

Job Description

The SoC Development team is seeking a highly motivatedTechnologistSoC Validation Engineerto join a team of experienced engineers working on the development of advanced controller SoCs.

As aSoC Validation Engineer, you will be responsible for planning, architecting, and executing validation strategies to validate complex hardware in System-on-Chip (SoC) ASICs. Your work will enable industry-leading data storage control SoCs deployed into high-volume consumer and enterprise products.

The growing diversity of data creates an exponential number of new possibilities – for the world, our company, and you. You'll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives, from sensors to mobile devices to the cloud. We've only started to scratch the surface of what data can do. You can help unlock its full potential.

Essential Duties And Responsibilities

• Ownership:End-to-end ownership of one or more subsystems or SoCvalidation flows, including planning, execution, and closure.
• Leadership & Mentorship:Lead and mentor junior/mid-level engineers, review their test plans, debug approaches, and ensure coverage and closure goals are met.
• Validation Strategy & Sign-Off:Define SoC-level validation strategies, establish sign-off criteria (functional, performance, power, stress, and PVT coverage), and drive execution to closure across multiple teams.
• Pre-/Post-Silicon Validation:Strong experience in bring-up, includingboard initialisation, power-on sequences, processor boot, and system debug.
• Datapath Validation:Ability to understand and validatecomplex datapath flowsof the controller, create datapath scenarios in SoC verification environmentandport them across pre-silicon and post-silicon environments.
• Protocol Expertise:Validation experience withDDR, PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, AXI, AHB, APB.
• Emulation Experience:Run complex SoC validation scenarios onPalladium/Emulation platformsto accelerate debug and pre-silicon coverage.
• Firmware & HAL Development:Developfirmware, bare-metal tests, and Hardware Abstraction Layer (HAL)to enable datapath, integration, and SoC-level validation.
• Validation Infrastructure:Build and maintain validation infrastructure, includingtest content, regression automation, and lab equipment integration(oscilloscopes, analyzers, logic probes).
• Debug Expertise:Proficiency in debugging SoC issues across multiple domains (digital logic, firmware, timing, low-power, DFT) usingJTAG, trace, waveform capture, and performance counters.
• Power & GLS Validation:Run and debuggate-level simulations, power-aware (UPF/CPF) validation, and validate ATE functional patterns.
• Performance & Stress Testing:Validate performance bottlenecks, traffic generation, and corner-case stress scenarios at the SoC level.
  
  

Qualifications

Required:

• BE or MS degree in Electrical Engineering or Computer Engineering, with9–13 years ofin SoCpre-/post-silicon validation and bring-up.
• Deep understanding ofC, embedded programming, and hardware/software co-validation methodologies.
• Good understanding ofSoC verification environments, SystemVerilog (SV), and UVMconcepts.
• Proven history ofdeveloping and executing validation strategiesfor complex SoCs.
  
  

Skills

• Team Leadership & Mentorship:Lead a team of validation engineers, review their test plans, debug approaches, and guide them toward coverage and closure goals.
• Validation Strategy & Sign-Off Ownership:Define SoC-level validation strategies, establish sign-off criteria (functional, performance, power, stress, PVT, etc.), and drive execution to closure across multiple teams.
• Ability todevelop and execute validation plansat IP, subsystem, and SoC levels.
• Strong experience inpre-/post-silicon bring-up, including board initialization, power-on sequences, and processor boot.
• Prior experience invalidation of DDR and PCIe protocolsat both pre- and post-silicon stages.
• Knowledge of variousinterfaces and standards: PCIe, LPDDR, USB, Ethernet, I²C, I3C, SPI, etc.
• Strong understanding ofbus protocols(AXI, AHB, APB) and interconnect fabrics.
• Ability to understand and validatecomplex datapath flowsand system-level interactions in SoCs.
• Ability to create complex datapath scenariosin SoC verification environments andport them to both pre-silicon and post-silicon validation.
• Proficiency in ASIC verification simulation tools(simulation, emulation, and debug environments).
• Emulation Experience:Running simulations and system-level validation on Palladium/Emulation platforms for datapath and SoC scenarios.
• Firmware Development:Hands-on experience in developingfirmware and bare-metal teststo validate datapath scenarios and SoC integration.
• HAL Development:Experience inHardware Abstraction Layer (HAL) developmentto support SoC validation and software bring-up.
• Experience withvalidation infrastructure development: test content, regression automation, and lab equipment integration (oscilloscopes, analyzers, logic probes).
• Proficiency indebugging SoC issuesusing JTAG, trace, waveform capture, and performance counters.
• Experience withgate-level/power-aware validation correlationand ATE pattern bring-up.
• Familiarity withperformance and stress testing, workload generation, and corner-case scenario validation.
• Cross-Functional Collaboration:Ability to work closely with design, verification, firmware, and product engineering teams to reproduce and resolve system-level issues.
• Proficiency inprogramming/scripting languagessuch as Python, Perl, TCL, and Bash for automation.
• Methodology Development:Define and evolve validation methodology to improve efficiency, coverage, and test portability across projects.
• Strong written and verbal communication skills.
• Demonstrated interest inASICs, SoCs, storage controllers, flash memory, and semiconductor components.
• Strongteam player, able to collaborate effectively across validation labs, design centers, and product engineering teams.
  
  

Additional Information

Sandisk thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Sandisk is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us [Confidential Information] advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying