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Technical Specialist - Design Verification
Location: Bangalore, Noida, Pune.
Experience: 8–14 Years.
About the Role:
We are looking for an experienced and passionate Senior Design Verification Engineer to join our team in Bangalore. The ideal candidate will have a strong background in pre-silicon verification of complex IPs or SoCs and be capable of leading verification efforts across multiple projects.
Key Responsibilities:
Required Skills and Qualifications:
Preferred Qualifications:
About Company:
ACL Digital, a leader in digital engineering and transformation, is part of the ALTEN Group. At ACL Digital, we empower organizations to thrive in an AI-first world. Our expertise spans the entire technology stack, seamlessly integrating AI and data-driven solutions from Chip to cloud. By choosing ACL Digital, you gain a strategic advantage in navigating the complexities of digital transformation. Let us be your trusted partner in shaping the future.
Job ID: 144764517
Skills:
Pcie, Verilog, Ethernet, Prototyping, Python, Scripting, Tcl, UCIe chiplet interconnects, AI tools, cdc, area optimization, Emulation, systemverilog, high-speed IO protocols, Rtl Design, formal verification, RDC, LINT, Timing Closure, silicon bring-up, CXL, micro-architecture, power efficiency
Skills:
Distributed Systems, Kubernetes, Python, Infrastructure automation, GPU resource management, Resource scheduling, Go, Performance optimization, Container runtimes, Multi-tenant platform architecture
Skills:
static timing analysis, Python, Verilog RTL, Genus Design Compiler, scripting or programming languages, DFT methodologies, high-speed SerDes, ASIC synthesis, Asic Physical Design, physical verification DRC LVS, 3DIC implementation methodologies, Cadence Virtuoso, RTL Compiler, place-and-route Encounter Innovus ICC, Clock Tree Synthesis
Skills:
Golang, Django, React, Azure Functions, Terraform, Docker, Ansible, FastAPI, Kubernetes, Python, Container Apps, Log Analytics, Bicep, Application Insights, Azure Monitor
Skills:
System Verilog, formal verification methodologies, C testcases, scripting for flow integration, Uvm, AI ML-driven EDA tools