Search by job, company or skills

Best NanoTech

Physical Design (PD) Mid Level Engineer

This job is no longer accepting applications

new job description bg glownew job description bg glownew job description bg svg
  • Posted a month ago

Job Description

Job Title: Physical Design Engineer Mid Level (46 Years)

Location: Bengaluru

Experience: 46 Years

Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field

Job Summary

We are seeking a highly motivated Physical Design Mid-Level Engineer with 46 years of experience in ASIC/SoC physical design. The candidate will be responsible for executing end-to-end physical design activities from RTL to GDSII, ensuring high-quality silicon delivery with optimal PPA.

Key Responsibilities

  • Execute and lead physical design activities for ASIC/SoC projects from RTL to GDSII.
  • Drive floorplanning, placement, Clock Tree Synthesis (CTS), routing, and timing closure.
  • Perform power analysis, IR drop analysis, and electromigration (EM) checks.
  • Manage physical verification including DRC, LVS, and sign-off processes.
  • Collaborate closely with RTL, synthesis, and verification teams to resolve design and integration issues.
  • Optimize designs for Power, Performance, and Area (PPA) while ensuring compliance with foundry requirements.
  • Handle Engineering Change Orders (ECOs) and support post-layout simulations.
  • Mentor and guide junior physical design engineers.
  • Coordinate with EDA vendors and stay updated with latest tools, methodologies, and technology nodes.

Required Technical Skills

  • Strong expertise in full-chip/block-level physical design flow.
  • Hands-on experience with industry-standard EDA tools (e.g., Cadence/ Synopsys tools).
  • Solid understanding of:
    • Timing closure and STA concepts
    • Low-power design techniques
    • Multi-voltage design and UPF/CPF
    • Advanced technology nodes (preferred)
  • Experience in handling sign-off checks and tape-out activities.
Preferred Qualifications

  • Experience in advanced nodes (e.g., 7nm/5nm/16nm).
  • Prior experience in mentoring junior engineers.
  • Strong debugging and problem-solving skills.
  • Excellent communication and cross-functional collaboration abilities.

Why Join Us

  • Opportunity to work on cutting-edge ASIC/SoC designs.
  • Exposure to advanced technology nodes.
  • Collaborative and innovation-driven work environment.
  • Career growth into senior technical/lead roles.

More Info

Job Type:
Function:
Employment Type:

About Company

Job ID: 142884087