Job Title: Physical Design Lead Engineer (ASIC / SoC)
Location: Bengaluru
Experience: 1015 Years
Employment Type: Full-Time
Education: B.E./B.Tech or M.E./M.Tech in Electronics, Electrical, or related field
Role Overview
We are looking for an experienced
Physical Design Lead Engineer to drive end-to-end ASIC/SoC physical implementation from RTL to GDSII. This leadership role requires deep expertise in advanced node physical design, strong sign-off knowledge, and the ability to mentor teams while delivering high-quality silicon.
The ideal candidate will combine strong hands-on implementation skills with leadership capabilities to guide projects through floorplanning, timing closure, power optimization, and final tape-out.
Key Responsibilities
Physical Design Execution
- Lead and execute complete physical design flow for ASIC/SoC projects from RTL to GDSII.
- Drive floorplanning, placement, clock tree synthesis (CTS), routing, and timing closure activities.
- Perform power optimization, congestion analysis, and physical implementation planning.
Sign-Off & Analysis
- Conduct power analysis, IR drop, and electromigration checks.
- Manage physical verification including DRC, LVS, and sign-off processes.
- Ensure designs meet foundry requirements and manufacturing guidelines.
Optimization & ECO
- Optimize designs for PPA (Power, Performance, Area).
- Handle ECO implementation, timing fixes, and post-layout simulations.
- Support tape-out readiness and final sign-off activities.
Collaboration & Leadership
- Collaborate with RTL, synthesis, STA, and verification teams to resolve design challenges.
- Mentor and guide junior physical design engineers.
- Coordinate with EDA vendors and stay updated with latest PD methodologies and tools.
Required Technical Skills- Strong hands-on expertise in ASIC/SoC Physical Design.
- Experience with full implementation flow: floorplan placement CTS routing sign-off.
- Strong knowledge of:
- Static Timing Analysis (STA)
- Power analysis & low-power methodologies
- Physical verification (DRC/LVS)
- ECO flows and post-layout validation
- Exposure to advanced nodes and high-performance designs preferred.
- Experience with industry-standard tools (Cadence Innovus, Synopsys ICC2, PrimeTime, Voltus/RedHawk or similar).
Leadership & Soft Skills
- Proven experience leading PD execution or small teams.
- Strong debugging and analytical skills.
- Excellent cross-functional communication and collaboration abilities.
- Ability to drive technical decisions and mentor engineers.
Nice to Have
- Experience with multi-voltage or low-power architectures.
- Scripting knowledge (TCL/Python/Shell) for automation.
- Prior tape-out experience at advanced technology nodes
