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We are Hiring: Senior & Lead Physical Design Engineers!
Looking to take on complex, sub-node ASIC challenges with an industry-leading team ACL Digital is expanding its VLSI team in Bengaluru! We are seeking high-caliber Physical Design Engineers with strong hands-on expertise in complete PnR flows to design next-generation silicon.
Key Highlights:
Role Responsibilities & Key Skills:
How to Apply:
If you are passionate about semiconductor design and ready for your next career leap, share your updated resume directly to: [Confidential Information]
Job ID: 153425047
Skills:
Debugging, Perl scripting, Cadence Tools, Innovus, RTL2GDS, IP QA, Mentor Calibre, Apache RedHawk, Genus, Synopsys Prime Time, CMOS circuit design fundamentals
Skills:
Clock Planning, Physical Verification, floorplanning, Timing Closure, Placement and Routing, Physical Design Implementation
Skills:
Perl, Python, Tcl, Innovus, Calibre, Assura, ICC2, Cadence, ICV, Synopsys
Skills:
Python, Tcl, floorplanning, Physical design flows, Clock CTS, Logical Equivalence, Synthesis, Timing Analysis, EDA Tools, Budgeting, Physical Verification DRC LVS ERC, Place And Route
Skills:
Routing, Shell Scripting, Tcl, Sta, Signoff, CTS, floorplanning, EM, Synopsys Fusion Compiler, Ir, LVS, FC Innovus, Physical Verification, MMMC, Timing Closure, Placement, DRC