PD Engineer
- Posted 2 months ago
- Be among the first 10 applicants
Job Description
Job Requirements
Design and Development: Responsible for the design, development, and implementation of physical layouts for integrated circuits or ICs.
Floor Planning: Create and optimize the physical layout of devices, using computer-aided design tools to ensure precision and efficiency.
Timing Closure: Ensure that the design meets specified timing requirements and standards.
Power and Signal Integrity: Analyze and optimize power consumption, including leakage and dynamic power, utilizing low power design techniques.
Collaboration: Work closely with front-end design engineers, DFT, and verification teams to ensure seamless integration and successful tape-out of silicon products.
Scripting: Develop and maintain scripts (TCL, Python, Perl) for design flow automation, efficiency improvements, and design analysis.
Design and Development: Responsible for the design, development, and implementation of physical layouts for integrated circuits or ICs.
Floor Planning: Create and optimize the physical layout of devices, using computer-aided design tools to ensure precision and efficiency.
Timing Closure: Ensure that the design meets specified timing requirements and standards.
Power and Signal Integrity: Analyze and optimize power consumption, including leakage and dynamic power, utilizing low power design techniques.
Collaboration: Work closely with front-end design engineers, DFT, and verification teams to ensure seamless integration and successful tape-out of silicon products.
Scripting: Develop and maintain scripts (TCL, Python, Perl) for design flow automation, efficiency improvements, and design analysis.
More Info
About Company
Skills:
hardware engineering , Perl Scripting, Sta, Circuit Level Comprehension, RTL to GDSII Implementation, Signal Integrity, Leakage Power, Multi-Vt Flow, IC design, Dfm, Power Supply Management, Deep Sub-Micron Design, Physical Design, High Frequency Design, Power Gating, PDN Methodology, PPA Targets, Timing Signoff
Skills:
Shell, Python, Tcl, Signal integrity crosstalk, primetime, Process technologies 7nm 14nm 28nm, Fusion Compiler, Tempus, Cadence Innovus, Static Timing Analysis STA, Floorplanning Placement, Voltus, Mentor Graphics tools Calibre DRC LVS, CTS Routing, Power analysis IR EM, ASIC SoC design flow, Synopsys ICC2