hardware engineering , Perl Scripting, Sta, Circuit Level Comprehension, RTL to GDSII Implementation, Signal Integrity, Leakage Power, Multi-Vt Flow, IC design, Dfm, Power Supply Management, Deep Sub-Micron Design, Physical Design, High Frequency Design, Power Gating, PDN Methodology, PPA Targets, Timing Signoff

Shell, Python, Tcl, Signal integrity crosstalk, primetime, Process technologies 7nm 14nm 28nm, Fusion Compiler, Tempus, Cadence Innovus, Static Timing Analysis STA, Floorplanning Placement, Voltus, Mentor Graphics tools Calibre DRC LVS, CTS Routing, Power analysis IR EM, ASIC SoC design flow, Synopsys ICC2

Python, Shell, perl, PnR tools, ASIC EMIR PD flow, EDA Tools, Redhawk-SC, Redhawk – IR and EM Analysis tool