This is your role.
- Questa verification IP s help design teams find more bugs in less time than conventional simulation techniques.
- You will specify, implement, test and enhance these verification components for a wide range of end user applications.
- You will work on technologies involving SV, UVM, Assertions, Coverage, Test plan, BFM design, debug, and logger.
- You will work well with TMEs and Field AEs or directly with customers to deploy or resolve customer issues.
We don t need superheroes, just super minds.
- Youre an Electronics Engineer (B.Tech/ M.Tech) or related field from a reputed institute
- Youve got excellent knowledge of verification engineering and have between 3 - 7 years of working experience as well.
- Youve sound knowhow of System Verilog for test bench with exposure to verification methodologies like UVM, VMM etc.
- Youve intimate knowledge of one or more standard bus protocols, like PCIe, USB, SATA, NVMe, Flash, DIMM etc.
- You are a great teammate, resilient and sincere, Enjoy learning new things and build knowledge base in new area.