C
Lead Design Engineer
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1. Proficient in Verilog coding and RTL design, data path designs,
2. Knowledge of RTL checks ex- LINT, SDC, CDC
3. Familiar with synthesis flow and timing constraints
4. Experience in writing Verilog testbench and running simulations.
5. Familiar with any of the interface Protocols like UCIe, PCIe, USB, MIPI(DPHY), HDMI/Display
Job ID: 148465887
Skills:
Project management, FE analysis, Cost validation, NPI design and development, Risk Mitigation, Problem Solving
Skills:
brownfield , Instrumentation Controls, Lng, Refinery
Skills:
Deep Learning, Jama, Computer Architecture, Data Structure Design, Neural Networks, Functional Safety ISO 26262, Embedded Processors, High-Performance Algorithms, Drivers and Low-Level Firmware Programming
Skills:
Debugging, System Verilog, Axi, CHI, Problem-solving skills, APB, ARM bus protocols, SoC system architecture, Uvm, AHB, Virtual Memory concepts
