Layout Design, Senior Engineer

Solidworks, Overmolding, Siemens Nx, Moldflow simulation analysis, Injection Molding, DFM reviews, Creo, Engineering plastics

matching , rc extraction , shielding , bandgap references , Perl, Tcl, ADC, latch-up strategies, Skill, high-speed analog custom layout, LVS, Power Planning, Dfm, Pll, clock routing, SERDES, Esd, EDA Tools, ERC, EMIR analysis, DRC, Cadence Virtuoso, LDOs

Dac, Perl, Tcl, GAA nodes, ADC, Skill, FinFET, deep sub-micron CMOS, LVS, Dfm, Pll, SERDES, ERC, EMIR analysis, EDA Tools, DRC, Cadence Virtuoso

Debugging Tools, Cadence LVS, RMAP, Verification Tools, Caliber DRC, ERC, LVS verification, Virtuoso XL

Design Patterns, Java, Git, Software Architecture, Agile Methodologies, Api Development, Debugging, Python, Performance optimization