Proficient in FPGA design flows using Xilinx tools, including compilation, simulation, synthesis, debugging, performance optimization, and implementation of advanced features.
Strong knowledge of hardware description languages such as Verilog, VHDL, and System Verilog.
Experience in integrating Soft IP or Hard IP like GTX/GTH transceivers, PCIe Gen3, CPRI, JESD, or FFT IP cores
Familiarity with designing common control interfaces such as AMBA AXI, UART, SPI, I²C, DDR, Ethernet, and USB.