Position Overview
We are looking for an FPGA / RTL Engineer to own the digital baseband and DSP implementation on our custom SDR hardware for satellite payloads. You will take algorithmic specifications for physical layer and DSP chains and implement them in Verilog/VHDL/SystemVerilog on FPGA/SoC platforms, ensuring timing closure, efficient resource usage, and reliable operation. This role is ideal for someone who enjoys taking waveforms from simulation to real-time hardware running on actual payload platforms.
Key Responsibilities
- Design, implement, and verify core digital logic and DSP pipelines on FPGA
- Implement filters, mixers, NCOs, interpolators/decimators, symbol timing recovery, and carrier recovery blocks in RTL for high-speed digital communications.
- Own FPGA development workflows, including synthesis, place & route, timing analysis, constraint management, and on-chip debugging.
- Collaborate with DSP/PHY engineers to translate floating-point algorithms into fixed-point, pipeline-efficient RTL architectures.
- Integrate FPGA blocks with RF front-ends, ADC/DAC interfaces, and on-board processors (e.g., Zynq RFSoC or similar).
- Develop and maintain test benches, simulation environments, and hardware-in-the-loop setups for unit, integration, and system-level verification of FPGA designs.
- Support bring-up, debugging, and root-cause analysis of FPGA-related issues using logic analyzers, JTAG, and on-chip debug cores.
- Contribute to documentation including design specifications, timing reports, ICDs, and verification reports for FPGA modules.
Required Qualifications
- Bachelor's degree in Electrical Engineering, Electronics, Computer Engineering, or a related field, or equivalent documented professional experience.
- 2–4 years of experience in FPGA/RTL development for communication, signal processing, or high-speed digital systems.
Must-Have Technical Skills
- Deep hands-on experience with FPGA development using Verilog and/or VHDL (or SystemVerilog) for high-speed digital communications.
- Proven ability to use FPGA toolchains (synthesis, place & route, timing analysis, on-chip debugging) to bring up custom digital hardware.
- Mandatory experience implementing complex DSP pipelines on FPGA: filters, mixers, numerically controlled oscillators, interpolators/decimators, symbol timing, and carrier recovery.
- Experience with Xilinx Zynq RFSoC or similar FPGA/SoC platforms for real-time DSP applications.
- Understanding of clocking, reset strategies, CDC handling, resource utilization, and latency trade-offs in FPGA designs.
- Familiarity with simulation tools, test bench creation, and assertion-based or constrained-random verification approaches.
- Comfort with Git/GitHub or similar for RTL code management and collaborative workflows.
- Experience using lab equipment (oscilloscopes, logic analyzers, spectrum analyzers, signal generators) for FPGA/system bring-up.
Nice-to-Have Technical Skills
- Exposure to digital communication systems, physical layer design, and basic RF concepts.
- Experience integrating FPGA cores with embedded processors and high-speed interfaces (e.g., AXI, JESD, Ethernet).
- Prior work on SDR platforms such as USRP, LimeSDR, or custom SDR hardware.
- Experience with hardware/software co-design, performance partitioning, and optimization of end-to-end SDR pipelines.
Professional Competencies
- Strong debugging mindset and systematic approach to narrowing down hardware issues.
- Ability to collaborate closely with DSP, RF, and software teams and communicate constraints and trade-offs clearly.
- Self-driven and comfortable taking ownership of FPGA blocks from specification to validated hardware.
- Comfortable working in a startup environment with iterative development and tight development timelines.
What You'll Gain
- Deep expertise in FPGA-based custom SDR development and space-qualified digital hardware.
- Hands-on experience integrating your designs into satellite payloads that will operate in orbit.
- Exposure to RF, DSP, and system engineering alongside experienced mentors in a compact, high-impact team.
Working Environment & Process
- Primarily on-site, based at Satlabs facilities in IITM Research Park, Chennai, Tamil Nadu, India.
- Access to RF test equipment, Linux workstations, SDR hardware, and FPGA tools for prototyping and validation.
- Project-driven work with regular milestones and growing ownership of critical FPGA components.
- Rolling application review; evaluation will include discussion of your FPGA projects, DSP pipelines, and problem-solving approaches.
