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Mirafra is hiring for Emulation Engineers with 5+Yrs Emulation experience.
job Description
* Mandatory skills - Emulation model development, transactor integration, or model bring-up activities.
* Substantial knowledge of emulation platforms offerings from various vendors such as Synopsys, Cadence, Siemens including extensive experience in building complex SOC emulation models
* Working knowledge in one or more of the following: Processor architecture, SOC components, SOC inter-connect buses, IO protocols (PCIe, CXL, Ethernet) and memory technologies interfaces (DDR, HBM)
* Experience in coding in scripting languages like Perl, Python, Tcl & UNIX Shell etc
* Ability to define the emulation strategy and platform requirements, Develop emulation test plan and drive execution of the emulation verification for large products on emulation platform such as Veloce, Zebu and Palladium.
Regards
Kalpana Bhatia
TA-Lead -Mirafra
Job ID: 148890595
Skills:
C, Verilog, System Verilog, IP level ASIC verification, Writing and debugging testbenches, Debugging SOC IO interfaces with Transactor solutions, SOC design model build experience, Debugging firmware and RTL code using simulation tools, Hands-on experience on Zebu Palladium Veloce platform, CPU GPU and Memory subsystem, BIOS OS bring up on full X86 SOC emulation platform, Verification methodologies, Understanding of PCIe USB Ethernet standards
Skills:
C, Verilog, System Verilog, IP level ASIC verification, Writing and debugging testbenches, Debugging SOC IO interfaces with Transactor solutions, SOC design model build experience, Debugging firmware and RTL code using simulation tools, Hands-on experience on Zebu Palladium Veloce platform, CPU GPU and Memory subsystem, BIOS OS bring up on full X86 SOC emulation platform, Verification methodologies, Understanding of PCIe USB Ethernet standards
Skills:
C, Verilog, System Verilog, IP level ASIC verification, Writing and debugging testbenches, SOC design model build experience, Debugging firmware and RTL code using simulation tools, Hands-on experience on Zebu Palladium Veloce platform, CPU GPU and Memory subsystem, BIOS OS bring up on full X86 SOC emulation platform, Debugging SOC IO interfaces with Transactor solutions in Emulation platform, Understanding of PCIe USB Ethernet standards
Skills:
C, Verilog, Gdb, System Verilog, Python, Tcl, Zebu, Veloce, Palladium, waveform debuggers
Skills:
C, Vcs, Gdb, Spi, Pcie, Perl, Ethernet, I2c, Python, Tcl, ProtoCompiler, HAPS 80, ASIC Logic RTL Design, Palladium, FPGA prototyping, quartus, AMBA, Zebu, Vivado, Veloce, Modelsim, VPS
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