Key skills:
- Embedded C/C++ on MCU/SoC targets with RTOS (VxWorks/RTEMS/FreeRTOS) and baremetal application design for hard realtime behaviors.
- Strong in defining application entities directly from ICDs; precise parsing, validation, versioning, and change tracking of ICD-driven interfaces.
- Data handling: raw-to-engineering unit conversions, scaling, calibration tables, endianness handling, fixedpoint arithmetic, and overflow/precision controls.
- Memory architecture: staticonly allocation, linker script awareness, partitioning between readonly/readwrite, placement across SRAM/DDR, cache coherency, and alignment.
- Concurrency and performance: multithreading/tasking, priority/timing analysis, IPC (queues, mailboxes, shared memory), DMA setup and tuning, ISR design, and lockfree patterns where applicable.
- Drivers and buses: UART/SPI/I2C/CAN/Ethernet; familiarity with ARINC 429/664 and MILSTD1553 is beneficial.
- Quality: MISRA C/C++, static analysis basics, unit testing on target, lab instrumentation (JTAG/GDB, oscilloscope, logic analyzer), and rigorous documentation.
Key responsibilities
- Derive software components from ICDs and requirements; define tasks, states, buffers, and message schemas; implement deterministic modules in C/C++ for RTOS/baremetal targets.
- Implement raw-to-engineering conversion pipelines, lookup/calibration, sanity checks, and error budgets; ensure numerical stability and deterministic timing.
- Own memory plans with static allocation only; segment code/data thoughtfully across ROM/RAM, SRAM/DDR; manage cache, MPU/MMU regions, and DMA-safe buffers.
- Develop and optimize peripheral drivers and DMA paths; implement IPC, health monitoring, watchdogs, and robust error handling/fault containment.
- Perform ontarget bringup, profiling, and debugging; validate latency/jitter, throughput, and memory footprints; produce clear design notes, test procedures, and change logs.
- Collaborate with systems and hardware teams to maintain ICD alignment and support bench/SIL/HIL testing; address defects with traceable fixes.
Experience required
24 years in embedded software development with handson realtime programming and ontarget debugging in regulated or safetycritical domains (avionics, automotive, medical, rail).
Handson experience reading and implementing against ICDs, setting up DMA/IPC, and crafting staticonly memory strategies in production firmware.
Nice to have
Exposure to avionics or radar systems, ARINC 429/664 or MILSTD1553, timing partitioning (e.g., ARINC 653 style), and basic awareness of DO178C processes.
NP : < 30DAYS
Location : CV Raman Nagar, Bangalore[ All day WFO and no WFH]
